Engineer II - Standard Cell Library

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Microchip’s Corporate Standard Cell Team defines and delivers standard cell IP used by global product development teams for SoC and ASIC designs. In this role, you will design, simulate, and support verification/characterization of standard cells (e.g., flip-flops, level shifters, and related low-power/high-performance library elements) across multiple technology nodes in a Linux-based design environment.

Key Responsibilities

• Design, simulate, and optimize standard cell circuits to meet performance, power, area, and reliability targets.
• Develop and refine standard cell architectures (e.g., sizing/beta ratio trade-offs, balanced timing).
• Design and evaluate sequential elements (including low-power, high-speed, retention, and multi-bit flip-flops).
• Design and validate level shifters, including wide voltage-range applications.
• Run and analyze SPICE simulations, including corner and Monte Carlo analysis.
• Support standard cell library characterization and modeling activities; collaborate with timing/characterization teams to ensure high-quality deliverables.
• Understand and apply technology and layout-related constraints; collaborate closely with layout teams to address parasitics and physical effects.

Requirements/Qualifications:

Required Qualifications

• B.E./B.Tech (or equivalent) in Electrical/Electronics Engineering or related field.
• Hands-on experience in standard cell circuit design and SPICE-based simulation.
• Working knowledge of CMOS digital/analog circuit fundamentals and variability/corner analysis.
• Familiarity with layout constraints and the impact of parasitics on circuit performance.
• Strong written and verbal communication skills in English.

Preferred Qualifications

• M.S. (or equivalent) in Electronics/VLSI or related specialization.
• Experience with complex sequential cells (e.g., retention, multi-bit, ultra-low-power, high-performance).
• Experience supporting library characterization and deliverables for ASIC/SoC flows.
• Scripting skills.

Experience

• Typically 2+ years of experience in standard cell design or closely related circuit design roles.

Travel Time:

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.